<?xml version="1.0" encoding="UTF-8"?><rss xmlns:dc="http://purl.org/dc/elements/1.1/" xmlns:content="http://purl.org/rss/1.0/modules/content/" xmlns:atom="http://www.w3.org/2005/Atom" version="2.0"><channel><title><![CDATA[Intel Microcode Updates]]></title><description><![CDATA[<p dir="auto">On linux e.g. ubuntu, there is regularly intel/amd microcode updates for security vulnerabilities. I don't think i have ever seen a microcode update on pfsense, although this week there have been 3 alone on linux.</p>
<p dir="auto">Is the code not updated? if not, why is there not a package for the microcode updates?</p>
]]></description><link>https://forum.netgate.com/topic/158300/intel-microcode-updates</link><generator>RSS for Node</generator><lastBuildDate>Wed, 12 Aug 2026 06:40:50 GMT</lastBuildDate><atom:link href="https://forum.netgate.com/topic/158300.rss" rel="self" type="application/rss+xml"/><pubDate>Thu, 12 Nov 2020 05:47:21 GMT</pubDate><ttl>60</ttl><item><title><![CDATA[Reply to Intel Microcode Updates on Sat, 11 May 2024 12:26:47 GMT]]></title><description><![CDATA[<p dir="auto">Well still no but I don't think that's that's same thing. They <a href="https://www.arm.com/technologies/custom-instructions" target="_blank" rel="noopener noreferrer nofollow ugc">appear</a> to be available only for Cortex-M CPUs and it's not clear to me if they can be updated after build.</p>
]]></description><link>https://forum.netgate.com/post/1168611</link><guid isPermaLink="true">https://forum.netgate.com/post/1168611</guid><dc:creator><![CDATA[stephenw10]]></dc:creator><pubDate>Sat, 11 May 2024 12:26:47 GMT</pubDate></item><item><title><![CDATA[Reply to Intel Microcode Updates on Sat, 11 May 2024 02:37:33 GMT]]></title><description><![CDATA[<p dir="auto"><a class="plugin-mentions-user plugin-mentions-a" href="/user/stephenw10">@<bdi>stephenw10</bdi></a> arm doesn’t use microcode it would be called Arm "custom instructions"</p>
]]></description><link>https://forum.netgate.com/post/1168586</link><guid isPermaLink="true">https://forum.netgate.com/post/1168586</guid><dc:creator><![CDATA[JonathanLee]]></dc:creator><pubDate>Sat, 11 May 2024 02:37:33 GMT</pubDate></item><item><title><![CDATA[Reply to Intel Microcode Updates on Sat, 11 May 2024 00:45:47 GMT]]></title><description><![CDATA[<p dir="auto">Nope, because there are none AFAIK. <a href="https://www.freshports.org/search.php?query=microcode" target="_blank" rel="noopener noreferrer nofollow ugc">https://www.freshports.org/search.php?query=microcode</a></p>
]]></description><link>https://forum.netgate.com/post/1168567</link><guid isPermaLink="true">https://forum.netgate.com/post/1168567</guid><dc:creator><![CDATA[stephenw10]]></dc:creator><pubDate>Sat, 11 May 2024 00:45:47 GMT</pubDate></item><item><title><![CDATA[Reply to Intel Microcode Updates on Sat, 11 May 2024 00:45:05 GMT]]></title><description><![CDATA[<p dir="auto"><a class="plugin-mentions-user plugin-mentions-a" href="/user/stephenw10">@<bdi>stephenw10</bdi></a> What about ARM Cortex-A53 r0p4??</p>
<p dir="auto">Does pfSense update the Arm "custom instructions" that might fix the compex issues right?</p>
]]></description><link>https://forum.netgate.com/post/1168561</link><guid isPermaLink="true">https://forum.netgate.com/post/1168561</guid><dc:creator><![CDATA[JonathanLee]]></dc:creator><pubDate>Sat, 11 May 2024 00:45:05 GMT</pubDate></item><item><title><![CDATA[Reply to Intel Microcode Updates on Sat, 14 Nov 2020 10:47:58 GMT]]></title><description><![CDATA[<pre><code>[2.4.5-RELEASE][root@pfSense.trmultiservice.lab]/root: service microcode_update onestart
Updating CPU Microcode...
Done.
</code></pre>
<pre><code>tail -n20 /var/log/dmesg.boot
</code></pre>
]]></description><link>https://forum.netgate.com/post/945541</link><guid isPermaLink="true">https://forum.netgate.com/post/945541</guid><dc:creator><![CDATA[kiokoman]]></dc:creator><pubDate>Sat, 14 Nov 2020 10:47:58 GMT</pubDate></item><item><title><![CDATA[Reply to Intel Microcode Updates on Sat, 14 Nov 2020 10:09:12 GMT]]></title><description><![CDATA[<p dir="auto"><a class="plugin-mentions-user plugin-mentions-a" href="/user/stephenw10">@<bdi>stephenw10</bdi></a> how can i see if the microcode is loaded and the version / or fixes covered</p>
]]></description><link>https://forum.netgate.com/post/945536</link><guid isPermaLink="true">https://forum.netgate.com/post/945536</guid><dc:creator><![CDATA[4o4rh]]></dc:creator><pubDate>Sat, 14 Nov 2020 10:09:12 GMT</pubDate></item><item><title><![CDATA[Reply to Intel Microcode Updates on Sat, 14 Nov 2020 00:42:22 GMT]]></title><description><![CDATA[<p dir="auto"><a class="plugin-mentions-user plugin-mentions-a" href="/user/stephenw10">@<bdi>stephenw10</bdi></a> said in <a href="/post/945407">Intel Microcode Updates</a>:</p>
<blockquote>
<p dir="auto">It only shows the 'microcode' log at the console or message buffer.</p>
</blockquote>
<p dir="auto">To be clear it does not log that message in the system log or dmesg output.</p>
<p dir="auto">Steve</p>
]]></description><link>https://forum.netgate.com/post/945514</link><guid isPermaLink="true">https://forum.netgate.com/post/945514</guid><dc:creator><![CDATA[stephenw10]]></dc:creator><pubDate>Sat, 14 Nov 2020 00:42:22 GMT</pubDate></item><item><title><![CDATA[Reply to Intel Microcode Updates on Fri, 13 Nov 2020 14:43:12 GMT]]></title><description><![CDATA[<p dir="auto"><a class="plugin-mentions-user plugin-mentions-a" href="/user/stephenw10">@<bdi>stephenw10</bdi></a> I don't have "Launching the init system...Updating CPU Microcode..." in my log. don't know how to see CPU capabilities other than the boot.mesg. Qotom 1900 has bios of 2018...but is fake, it is the same bios as the original 2015 version inc. ACPI bugs.</p>
]]></description><link>https://forum.netgate.com/post/945425</link><guid isPermaLink="true">https://forum.netgate.com/post/945425</guid><dc:creator><![CDATA[4o4rh]]></dc:creator><pubDate>Fri, 13 Nov 2020 14:43:12 GMT</pubDate></item><item><title><![CDATA[Reply to Intel Microcode Updates on Fri, 13 Nov 2020 14:17:52 GMT]]></title><description><![CDATA[<p dir="auto">It only shows the 'microcode' log at the console or message buffer. Or you can see it in the CPU capabilities list if that particular CPU is actually updated. If you have a newer BIOS there may not be an update for J1900 over what's already loaded.</p>
<p dir="auto">Steve</p>
]]></description><link>https://forum.netgate.com/post/945407</link><guid isPermaLink="true">https://forum.netgate.com/post/945407</guid><dc:creator><![CDATA[stephenw10]]></dc:creator><pubDate>Fri, 13 Nov 2020 14:17:52 GMT</pubDate></item><item><title><![CDATA[Reply to Intel Microcode Updates on Fri, 13 Nov 2020 06:04:32 GMT]]></title><description><![CDATA[<p dir="auto"><a class="plugin-mentions-user plugin-mentions-a" href="/user/stephenw10">@<bdi>stephenw10</bdi></a> i don't see any microcode for the J1900 loaded. But it was more of a general question</p>
]]></description><link>https://forum.netgate.com/post/945334</link><guid isPermaLink="true">https://forum.netgate.com/post/945334</guid><dc:creator><![CDATA[4o4rh]]></dc:creator><pubDate>Fri, 13 Nov 2020 06:04:32 GMT</pubDate></item><item><title><![CDATA[Reply to Intel Microcode Updates on Thu, 12 Nov 2020 20:41:04 GMT]]></title><description><![CDATA[<p dir="auto">The microcode in the CPU is updated at boot, for example:</p>
<pre><code>Launching the init system...Updating CPU Microcode...
CPU: Intel(R) Core(TM) i3-6100T CPU @ 3.20GHz (3192.16-MHz K8-class CPU)
  Origin="GenuineIntel"  Id=0x506e3  Family=0x6  Model=0x5e  Stepping=3
  Features=0xbfebfbff&lt;FPU,VME,DE,PSE,TSC,MSR,PAE,MCE,CX8,APIC,SEP,MTRR,PGE,MCA,CMOV,PAT,PSE36,CLFLUSH,DTS,ACPI,MMX,FXSR,SSE,SSE2,SS,HTT,TM,PBE&gt;
  Features2=0x7ffafbbf&lt;SSE3,PCLMULQDQ,DTES64,MON,DS_CPL,VMX,EST,TM2,SSSE3,SDBG,FMA,CX16,xTPR,PDCM,PCID,SSE4.1,SSE4.2,x2APIC,MOVBE,POPCNT,TSCDLT,AESNI,XSAVE,OSXSAVE,AVX,F16C,RDRAND&gt;
  AMD Features=0x2c100800&lt;SYSCALL,NX,Page1GB,RDTSCP,LM&gt;
  AMD Features2=0x121&lt;LAHF,ABM,Prefetch&gt;
  Structured Extended Features=0x29c67af&lt;FSGSBASE,TSCADJ,SGX,BMI1,AVX2,SMEP,BMI2,ERMS,INVPCID,NFPUSG,MPX,RDSEED,ADX,SMAP,CLFLUSHOPT,PROCTRACE&gt;
  Structured Extended Features3=0x9c002400&lt;MD_CLEAR,TSXFA,IBPB,STIBP,L1DFL,SSBD&gt;
  XSAVE Features=0xf&lt;XSAVEOPT,XSAVEC,XINUSE,XSAVES&gt;
  VT-x: PAT,HLT,MTF,PAUSE,EPT,UG,VPID
  TSC: P-state invariant, performance statistics
Done.
.... done.
</code></pre>
<p dir="auto">Most security updates for microcode are not directly applicable to a bare metal firewall.</p>
<p dir="auto">Is there a specific update you're looking for?</p>
<p dir="auto">Steve</p>
]]></description><link>https://forum.netgate.com/post/945296</link><guid isPermaLink="true">https://forum.netgate.com/post/945296</guid><dc:creator><![CDATA[stephenw10]]></dc:creator><pubDate>Thu, 12 Nov 2020 20:41:04 GMT</pubDate></item></channel></rss>