Watchguard XTM 5 Series
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My experience with my 1250e was super slow with the Kingston 4GB card I used.
arubial1229,
What is the Kingston CF card model? Was it the "standard" model http://www.kingston.com/en/flash/cf_cards#cf?
Also for nanobsd, the filesystem is mounted with sync option, this seriously slow down the disk I/O.
Without sync option, you might double the I/O speed (still much slower than HDD/SSD), but sacrifice reliability - loss of power can easily corrupt the filesystem.
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My experience with my 1250e was super slow with the Kingston 4GB card I used.
arubial1229,
What is the Kingston CF card model? Was it the "standard" model http://www.kingston.com/en/flash/cf_cards#cf?
Also for nanobsd, the filesystem is mounted with sync option, this seriously slow down the disk I/O.
Without sync option, you might double the I/O speed (still much slower than HDD/SSD), but sacrifice reliability - loss of power can easily corrupt the filesystem.
Yes, I was using the Standard 4GB model. No worries though, I will be using an SSD in the XTM5. Thanks!
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Has anyone got one of these to work with 2.2 and the LCDproc packages?
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Hmm, I thought I did but I just checked and don't. Just tried to install but it failed. I'm running an older snapshot though, I'll update and retry….
Steve
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Ok so there's definitely something not right here but the underlying driver seems to work fine. I have it running on yesterdays snapshot, 64bit.
As with previous pfSense and lcproc versions the package really has a hard time at start up. In fact it seems even worse than under 2.1.X, I failed to make it start at all using the package gui and the php client. I was able to start it manually using shellcmd entries but there is a difference. As with 2.1.X you have to install the package and then enable the server and client in the package gui setup. This generates the LCDd.conf file you need. However unlike in 2.1.X diabling lcdproc and setting the port to 'none' fails to remove the rc script so it still tries to start (and fails!) at boot. You could either re-install the lcdproc-dev package which will remove the file or probably remove it manually. Or just use the attached file I made earlier without enabling lcdproc via the gui at all. ;)Seems like a bug somewhere, even buggier than before.
Steve
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Some time ago, like 2.5 years now :o, I spent some time trying to enable SpeedStep on the XTM5. After many, many hours of reading forums, blogs and datasheets I managed to produce a DSDT table that was loadable at boot to override that passed via ACPI and seemed to actually enable a functioning set of P-States. Shortly after that the machine I was using to compile the tables crashed and burned and most of my work was lost. No backup. Since then I have occasionally been inspired to retry but have failed until a few days ago. So find attached the source (.dsl) and compiled table (.aml) before I loose it again. ;) The .png extensions are there only to allow the attachments on the forum, remove them.
To override the table passed by the bios you have to load the .aml file into /boot and then add to /boot/loader.conf.local:
acpi_dsdt_load="YES" acpi_dsdt_name="/boot/dsdt5.aml"It would be nice to have the file in /conf since it would then survive a firmware update but I'm not sure you can do that yet. Edit: Nope.
The table is specific to the E4500 Core2Duo I'm running but will probably work to some extent with any dual core CPU. It simply adds the required methods to export the P-state values via ACPI so the est(4) driver can find them. I have added 6 P-states with frequencies from 2.2GHz to 1.2GHz. It's worth noting that both the frequency displayed and the power value are simply taken from the table and not calculated so while the frequncy is probably correct the power is not.
[2.2-BETA][root@xtm5.localdomain]/root: sysctl dev.cpu.0 dev.cpu.0.%desc: ACPI CPU dev.cpu.0.%driver: cpu dev.cpu.0.%location: handle=\_PR_.CPU0 dev.cpu.0.%pnpinfo: _HID=none _UID=0 dev.cpu.0.%parent: acpi0 dev.cpu.0.freq: 2200 dev.cpu.0.freq_levels: 2200/65000 2000/60000 1800/55000 1600/45000 1400/35000 1200/25000 dev.cpu.0.cx_supported: C1/1/1 dev.cpu.0.cx_lowest: C1 dev.cpu.0.cx_usage: 100.00% last 333us dev.cpu.0.coretemp.delta: 58 dev.cpu.0.coretemp.resolution: 1 dev.cpu.0.coretemp.tjmax: 85.0C dev.cpu.0.coretemp.throttle_log: 0 dev.cpu.0.temperature: 27.0CAs before I found that the power consumption of the box is barely affected by the selected P-state at idle. This seems to be down to the fact that the minimum voltage the CPU will allow is not very low, VID 1D. That's only (0xB*12.5) 0.14V below the standard voltage. Attempting to set a lower voltage just results in the minimum value. Additionally there is no way to set SLFM (super low frequency mode) where lower voltages are allowable. I tried several new methods to do so. I'm not actually sure if SLFM is available on desktop C2Ds anyway. However I am now convinced that Speedstep is in fact working because you can see the performance difference at different P-states:
[2.2-BETA][root@xtm5.localdomain]/root: sysctl dev.cpu.0.freq dev.cpu.0.freq: 2200 [2.2-BETA][root@xtm5.localdomain]/root: openssl speed -evp aes-128-cbc Doing aes-128-cbc for 3s on 16 size blocks: 15882837 aes-128-cbc's in 3.00s Doing aes-128-cbc for 3s on 64 size blocks: 4528031 aes-128-cbc's in 3.00s Doing aes-128-cbc for 3s on 256 size blocks: 1176727 aes-128-cbc's in 3.00s Doing aes-128-cbc for 3s on 1024 size blocks: 297511 aes-128-cbc's in 3.00s Doing aes-128-cbc for 3s on 8192 size blocks: 37351 aes-128-cbc's in 3.00s OpenSSL 1.0.1i-freebsd 6 Aug 2014 built on: date not available options:bn(64,64) rc4(16x,int) des(idx,cisc,16,int) aes(partial) idea(int) blowfish(idx) compiler: cc The 'numbers' are in 1000s of bytes per second processed. type 16 bytes 64 bytes 256 bytes 1024 bytes 8192 bytes aes-128-cbc 84708.46k 96597.99k 100414.04k 101550.42k 101993.13k [2.2-BETA][root@xtm5.localdomain]/root: sysctl dev.cpu.0.freq=1200 dev.cpu.0.freq: 2200 -> 1200 [2.2-BETA][root@xtm5.localdomain]/root: openssl speed -evp aes-128-cbc Doing aes-128-cbc for 3s on 16 size blocks: 8649110 aes-128-cbc's in 2.99s Doing aes-128-cbc for 3s on 64 size blocks: 2468860 aes-128-cbc's in 3.00s Doing aes-128-cbc for 3s on 256 size blocks: 641165 aes-128-cbc's in 2.99s Doing aes-128-cbc for 3s on 1024 size blocks: 162376 aes-128-cbc's in 3.01s Doing aes-128-cbc for 3s on 8192 size blocks: 20327 aes-128-cbc's in 2.99s OpenSSL 1.0.1i-freebsd 6 Aug 2014 built on: date not available options:bn(64,64) rc4(16x,int) des(idx,cisc,16,int) aes(partial) idea(int) blowfish(idx) compiler: cc The 'numbers' are in 1000s of bytes per second processed. type 16 bytes 64 bytes 256 bytes 1024 bytes 8192 bytes aes-128-cbc 46249.03k 52669.01k 54855.60k 55280.38k 55651.19kThe observed difference seems to be in the ratio expected also.
The way to reduce power consumption here then would seem to be to choose a CPU that allows a lower voltage to be set. I have no idea how to find that though. Anyone running anything interesting? It may also help to enable all the available C-states. Last time it looks like I did enable C2 but if I recall it resulted in catastrophic lagging. C1E may offer more potential though.
Steve
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Anyone running anything interesting?
I just went to the local computer store and found an E4300 (1.8ghz) that I installed today… I don't know if that would help you test or not.
Im more interested in getting a dual core unit in this box so losing a little speed on a single core didn't bother me. With two cores though it should be faster.
I am noticing though that the single core model reported (without onboard monitoring) +- 55c for a temp and now both cores hover right at 30c. I believe the board temp was lying.
Anyone know if these units will run a PLGA775 socket proc? (E4700) The E4600 unit seems to be the last LGA775...
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Can someone please confirm that the installation instructions in this thread also works for the WatchGuard XTM 525 model as well. I just purchased one from Ebay very cheap and would like to install pfSense. Please advise ASAP.
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One more question. I can't find any specs on the CPU, memory, and other hardware details on the Watchguard XTM 525 model.
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The 525 is one of the second gen XTM5 models. I've never seen one. I would expect it to be just as easy to install but no promises. ;)
Anything you can tell us about the hardware would be great.Steve
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The E4600 unit seems to be the last LGA775…
There seem to be a lot of cpus that will work. The only reason I chose the E4500 was because it closely matched the original celeron. Same lithography size and same FSB speed. Others here have fitted various others. I think the most 'extreme' confirmed to work is a Q8200S. Bare in mind that the XTM5 has a less powerful PSU and fewer fans than the Lanner box it's based on.
Steve
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The 525 is one of the second gen XTM5 models. I've never seen one. I would expect it to be just as easy to install but no promises. ;)
Anything you can tell us about the hardware would be great.Steve
I will be getting the box on Thursday and will report the hardware. Now I need to read up on the installation instructions.. It would be great if someone gave me a quick overview of the installation instructions. Additionally, is there anything (cables, CF card, etc.) I need to purchase for the installation process.
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On the gen 1 XTM5 is really pretty straight forward:
Download an appropriate pfSense NanoBSD image such as this: http://files.uk.pfsense.org/mirror/downloads/pfSense-2.1.5-RELEASE-1g-amd64-nanobsd.img.gz
Write the image to a CF card (of 1GB or bigger). Use physdiskwrite directly or extract the image from the gzip file and use Win32diskimager.
Insert the CF card in the XTM5 and boot. :DYou will need to have the console cable connected and a terminal running at 9600bps so that you can do the initial interface assignment before connecting to the webgui.
You may have read about the unlocked BIOS in this thread but that's for the gen1 box, DO NOT try to flash that. ;)
You may also choose to go straight to a 2.2beta image, the RC is imminent at this point.
The only thing we have to go on in terms of hardware is the official hardware guide. It states 'Intel dual core CPU'. The gen1 box had a single core Celeron so that's definitely different. The PSU look slightly different but could just be a change of manufacturer. Other than that it looks identical externally.
Steve
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On the gen 1 XTM5 is really pretty straight forward:
Download an appropriate pfSense NanoBSD image such as this: http://files.uk.pfsense.org/mirror/downloads/pfSense-2.1.5-RELEASE-1g-amd64-nanobsd.img.gz
Write the image to a CF card (of 1GB or bigger). Use physdiskwrite directly or extract the image from the gzip file and use Win32diskimager.
Insert the CF card in the XTM5 and boot. :DYou will need to have the console cable connected and a terminal running at 9600bps so that you can do the initial interface assignment before connecting to the webgui.
You may have read about the unlocked BIOS in this thread but that's for the gen1 box, DO NOT try to flash that. ;)
You may also choose to go straight to a 2.2beta image, the RC is imminent at this point.
The only thing we have to go on in terms of hardware is the official hardware guide. It states 'Intel dual core CPU'. The gen1 box had a single core Celeron so that's definitely different. The PSU look slightly different but could just be a change of manufacturer. Other than that it looks identical externally.
Steve
The unit will not come with the console cable. Do you know how to build one? Please advise.
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I have a Watchguard cable but I think a Cisco cable is the same (will work). It's DB9 one end and RJ45 the other.
https://forum.pfsense.org/index.php?topic=43574.msg413770;topicseen#msg413770
https://forum.pfsense.org/index.php?topic=43574.msg421117;topicseen#msg421117Steve
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I use a Cisco cable here just fine.
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I use a Cisco cable here just fine.
Can you provide me more details.. If you have an example of one on Ebay, please provide me a link to the Ebay auction. I don't have any serial ports on my laptop, so would I need a serial or RJ45 to USB cable as well. Please advise.
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Yes you will need a USB-Serial port adapter. Alternatively you can get an all in one device like this:
http://www.ebay.co.uk/itm/251718442782
I've not used that specifically myself but I would imagine it will work fine with the XTM5.Steve
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On the gen 1 XTM5 is really pretty straight forward:
Download an appropriate pfSense NanoBSD image such as this: http://files.uk.pfsense.org/mirror/downloads/pfSense-2.1.5-RELEASE-1g-amd64-nanobsd.img.gz
Write the image to a CF card (of 1GB or bigger). Use physdiskwrite directly or extract the image from the gzip file and use Win32diskimager.
Insert the CF card in the XTM5 and boot. :DYou will need to have the console cable connected and a terminal running at 9600bps so that you can do the initial interface assignment before connecting to the webgui.
You may have read about the unlocked BIOS in this thread but that's for the gen1 box, DO NOT try to flash that. ;)
You may also choose to go straight to a 2.2beta image, the RC is imminent at this point.
The only thing we have to go on in terms of hardware is the official hardware guide. It states 'Intel dual core CPU'. The gen1 box had a single core Celeron so that's definitely different. The PSU look slightly different but could just be a change of manufacturer. Other than that it looks identical externally.
Steve
I want to make sure I download the right pfsense image file for the Watchguard XTM 525 model. Can someone please confirm (see below)….
Which Image Do I Need?
Computer Architecture: AMD64 (64-bit)
Platform: Embedded (NanoBSD) typically with CF
Console: Serial
CF card size: 1 GB
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Yep, that should get you the same file I linked to above.
You can use 32bit of course if you want. We don't know what CPU your box will have but I'm assuming it's 64bit capable. ;)The docs wiki page has recently been greatly improved for writing images I've just noticed:
https://doc.pfsense.org/index.php/Writing_Disk_ImagesSteve
