Intel Xeon Scalable 4th Gen Caveats?
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@Sergei_Shablovsky
I am running a 40Gig network currently and using special gigamon equipment to split my loads out across multiple boxes for an all encompassing solution.looking to upgrade to 100g 400g or maybe 800g (depending on how soon and at what price point celestica is releasing their 800gb switch).
The 100gb capability is theoretical maximum for the 8970 and the chip can't perform compression or decryption/encryption at that rate.To meet 100gb for both compression AND encryption at the same time, it would require 5 cards.
To meet or exceed encryption alone it would require 3 or 4 cards alone. -
@Epimpin said in Intel Xeon Scalable 4th Gen Caveats?:
@JonathanLee That would be nice because I am currently using a cluster of equipment to perform different types of sideband scanning and inline stuff using gigamon equipment. The gigamon stuff is neat but I dont have a million dollars to upgrade and save a couple kw.
I an currently slicing traffic and distributing into mutiple snort ids boxes, suicata, etc, and then sending it to a packet shaping and aggragation layer and re-timing to a distribution layer.
If You are on so high level that really NEED 3-5 of QAT 8970…may be reasonable just pick up the phone and speak with Intel head office representative or STH ?
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@JonathanLee
Okay, No confirmation, you had me all excited there for a second.It would be hella nice to take full advantage of the intel scalable platform and the
avx-512 design and it would be even cooler if I could use the built in QAT chiplets in the 5th gen + sku's.But as of right now I don't even know how pfsense or freebsd even behaves with E-cores. I have threads up in multiple support forums for this exact question.
There is a reason why the CPU'S are so expensive to begin with, and it aint their speed. Its the built in high tech functionality and a firewall or ids/ips system could really reap the benefits of ALL of it if it were fully implemented. Not to mention there are special skus that allow the QAT on die to work directly with pcie based QAT chips and even other system and the QAT chiplets can talk directly to an FPGA based intel quickpath 100g nic, totally skipping the chipset.
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Imagine if pfSense ran on a Ciena 6500 system 1.6 Tb/s performance optics. Run it on the management card. Talk about End of the line for bad guy websites. URL blocking right at the isp backbone system. Wouldn’t that be cool? Could the software do hardware convergence with that kind of speed?? Could it run with MPO cables? Who knows.
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@JonathanLee
That would be amazing.
More interesting would be inline antivirus and tunneling.
I cant seem to find a pic of Ciena WLe6 optics, do you have any @JonathanLee? Im still on crappy little 40gb cwdm optics.
Who knows is someone that owns the equipment who has tried it. If I owned, I would try. -
@Epimpin No photography sorry.
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@JonathanLee
Damn, guess I gotta call my Ciena rep. I am curious as to what config they use to reach 1.6tbps. I mean I can do that all day down a single fiber pair with DWDM but not on a single line card. -
If that's the 4xxx series device it was recently added to the gui: https://redmine.pfsense.org/issues/15233.
Otherwise check the driver for what is supported:
https://github.com/pfsense/FreeBSD-src/blob/devel-main/sys/dev/qat/include/common/adf_accel_devices.h#L12 -
@stephenw10
Thanks for the response Steve, I believe it is and found out I was not the only one asking for this. :)I guess we I have to do a little digging about those registers and device names and compare and then try it out.
@stephenw10 How does pfsense handle multiple qat accelerators?
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Good question, I've never seen one to find out. I imagine it would have to be in the QAT driver or possibly the crypto framework.
