Watchguard XTM 5 Series
-
Upload the aml file to, for example, /root.
Create the file /boot/loader.conf.local then add to it:
acpi_dsdt_load="YES" acpi_dsdt_name="/root/ACPI_AML_E3400_A3.aml"
You need to actually enable speedstep in the BIOS as well as having an aml file the defines the steps. So that requires you flash one of the unlocked versions. If you use the one with the correct dsdt in it you obviously don't need the aml file.
When it's functioning you will see the est device attach at boot and after enabling powerd you will see the reported CPU frequency change on the dashboard or in the sysctl output.
Steve
-
Thank you for the info @stephenw10 !
Do you recommend using flashrom?
And, just theoretically, if i brick my system, how do i restore the previous ROM, assuming i have the backup? I guess the question is how do i connect to the bricked system shell to run flashrom? -
You can write the ROM directly to the chip using the SPI header. You need some sort of flashing tool to do that but it can be as simple as 4 resistors and a parallel port:
https://forum.netgate.com/post/336712Pretty sure I don't have anything with a parallel port any longer!
You can get a USB flash tool relatively easily if you need it.Steve
-
-
Hi everyone, maybe this is a silly question but where can I find the correct AML or DSDT file for my processor? Currently I have an e8500.
Also I flashed a modified BIOS but I don't see Speedstep in it anywhere. Is it named something different?
This is the one i used xtm515-bios1.3-unlocked1.9.rom (is it the newest/best version?)
-
@tiggymiggy said in Watchguard XTM 5 Series:
xtm515-bios1.3-unlocked1.9.rom
That's t-rexky's mod I assume. It's more recent than what I did and probably done with better tools.
I have an aml file I used with the E8400 you could try. Otherwise you'd need to compile one for yourself. Been a while since I did it but it wasn't that hard IIRC.
Steve
-
@stephenw10 said in Watchguard XTM 5 Series:
@tiggymiggy said in Watchguard XTM 5 Series:
xtm515-bios1.3-unlocked1.9.rom
That's t-rexky's mod I assume. It's more recent than what I did and probably done with better tools.
I have an aml file I used with the E8400 you could try. Otherwise you'd need to compile one for yourself. Been a while since I did it but it wasn't that hard IIRC.
Steve
Hi Steve,
I installed your BIOS image and I now see C1E option under the processor section. It is enabled but I don't think it's working since i feel quite a bit of heat coming out the back of the unit at idle.
Is there any post or information you can share regarding compiling the needed AML file? I want to try it with the e8500. I will need to repeat the process once my low powered Xeon comes in.
Bonus question: How can I change the text string on the LCD panel during bootup?
-
You can see the C state usage at in the sysclts:
dev.cpu.3.cx_method: C1/mwait/hwc C2/mwait/hwc dev.cpu.3.cx_usage_counters: 0 405 dev.cpu.3.cx_usage: 0.00% 100.00% last 858us dev.cpu.3.cx_lowest: C2 dev.cpu.3.cx_supported: C1/1/1 C2/2/50 dev.cpu.2.cx_method: C1/mwait/hwc C2/mwait/hwc dev.cpu.2.cx_usage_counters: 0 926 dev.cpu.2.cx_usage: 0.00% 100.00% last 178us dev.cpu.2.cx_lowest: C2 dev.cpu.2.cx_supported: C1/1/1 C2/2/50 dev.cpu.1.cx_method: C1/mwait/hwc C2/mwait/hwc dev.cpu.1.cx_usage_counters: 5 1264 dev.cpu.1.cx_usage: 0.39% 99.60% last 33us dev.cpu.1.cx_lowest: C2 dev.cpu.1.cx_supported: C1/1/1 C2/2/50 dev.cpu.0.cx_method: C1/mwait/hwc C2/mwait/hwc dev.cpu.0.cx_usage_counters: 159 64353 dev.cpu.0.cx_usage: 0.24% 99.75% last 623us dev.cpu.0.cx_lowest: C2 dev.cpu.0.cx_supported: C1/1/1 C2/2/50
You have to set the 'lowest' value if you want to use them. Usually is set by default.
Decompiling/compiling the AML isn't that difficult. Pretty sure I used Intel's standard tools.
The LCD message at boot requires extracting one of the BIOS modules and hexediting it. Or at least that's what I did.
-
I'm very new to this. How can I see those statistics/lines?
In the boot log I see the following:
est: cpu_vendor GenuineIntel, msr 616492206004922
est: CPU supports Enhanced Speedstep, but is not recognized.
est: cpu_vendor GenuineIntel, msr 616492206004922
est: CPU supports Enhanced Speedstep, but is not recognized.
est0: <Enhanced SpeedStep Frequency Control> on cpu0In the general log when i turned on PowerD I see this:
/system_advanced_misc.php: The command '/usr/sbin/powerd -b 'min' -a 'adp' -n 'adp'' returned exit code '69', the output was 'powerd: no cpufreq(4) support -- aborting: No such file or directory'Hmm, I googled and this is what I see when i run the comment:
sysctl dev.cpu |grep cx
dev.cpu.1.cx_method: C1/hlt
dev.cpu.1.cx_usage_counters: 8371860
dev.cpu.1.cx_usage: 100.00% last 4901us
dev.cpu.1.cx_lowest: C1
dev.cpu.1.cx_supported: C1/1/0dev.cpu.0.cx_method: C1/hlt
dev.cpu.0.cx_usage_counters: 7787019
dev.cpu.0.cx_usage: 100.00% last 18023us
dev.cpu.0.cx_lowest: C1
dev.cpu.0.cx_supported: C1/1/0Not really sure what it means. C1 lowest I guess is speedstep enabled? But other power states are missing?
Sorry if I'm asking too many questions, I just really like this unit and want to get it squared away
-
Ah, sorry I thought I'd included the sysctl command. Fail.
I also forgot that you need an aml file loaded to get speedstep to work because the bios doesn't generate the p-state tables by default in the xtm5. That's the main reason for loading one.
It also looks like it only supports C1 and that's enabled anyway.
Also C-states are different to P-states which is what speedstep and turbo control.
See: https://en.wikipedia.org/wiki/ACPI#Power_states -
OK, so looks like I need to generate this file. All I can find is Hackintosh community posts. Is it the same process?
-
Yup. Try my 8400 file. Probably a single edit from that. Or it might just work fine as is.
xtm5_e8400.aml.txt -
@stephenw10 Thanks for this file, I will try it in my pfsense install per your earlier posts in this thread.
I am comparing it ti t-rexy's aml files, looks like I just need to get the right values in the _pr section.. The question is, how do I find or generate the correct values for this section?
Scope (_PR) { Processor (CPU1, 0x01, 0x00000810, 0x06) { Name (_PPC, Zero) // _PPC: Performance Present Capabilities Name (_PCT, Package (0x02) // _PCT: Performance Control { ResourceTemplate () { Register (FFixedHW, 0x10, // Bit Width 0x00, // Bit Offset 0x0000000000000199, // Address ,) }, ResourceTemplate () { Register (FFixedHW, 0x10, // Bit Width 0x00, // Bit Offset 0x0000000000000198, // Address ,) } }) Name (_CST, Package (0x02) // _CST: C-States { One, Package (0x04) { ResourceTemplate () { Register (FFixedHW, 0x01, // Bit Width 0x02, // Bit Offset 0x0000000000000000, // Address 0x01, // Access Size ) }, One, 0x02, 0x61A8 } }) Name (_PSS, Package (0x04) // _PSS: Performance Supported States { Package (0x06) { 0x0BB8, 0xFDE8, 0x0A, 0x0A, 0x0924, 0x0924 }, Package (0x06) { 0x0A6A, 0xD228, 0x0A, 0x0A, 0x081E, 0x081E }, Package (0x06) { 0x091D, 0xB98C, 0x0A, 0x0A, 0x071A, 0x071A }, Package (0x06) { 0x07D0, 0xA410, 0x0A, 0x0A, 0x0616, 0x0616 } }) }
EDIT:
File works! Now showing frequency strangely enough, of course max is now showing 3Ghz as the 8400 max frequency is. Really excited to get this aml file sorted! -
Package (0x06) { 0x07D0, 0xA410, 0x0A, 0x0A, 0x0616, 0x0616 }
It's been a while but IIRC you need one entry for each state.
0x07D0 is 2000MHz the lowest speed
0xA410 is the CPU voltage but I forget how that's calculated
0x0616 is the CPU wattage passed to the OS, what pfSense shows in the sysctls. -
Could the voltage calculation have something to do with this? values are off... seem to need to divide by 4 to get in the right ballpark. i will keep looking though
Meaning of the fid and vid
The frequency ID (fid) is the multiplier for the reference clock (e.g. the FSB clock). The voltage ID (vid) is processor specific.Unfortunately Intel publishes no information about the meaning of this value but the conversion formula for Core CPU's seems to be
UCpu = 700 mV + vid x 12.5 mV
and for Core 2 CPU's it seems to be
UCpu = 800 mV + vid x 12.5 mV
-
Hi all
Is amibcp useful to change what is displayed on LCD ??
What field ?After flashrom xtm5_83.rom it displays pfsense v1.8
-
You have to extract the module and then hex-edit it to change that. Or at least that's what I did long, long ago!
There are some more details on the forum here if you search through it.
Steve
-
Maybe you are referring to once pfsense is booted, you want to see other details on the LCD?
If so, you need to install the LCDproc package from the pfsense package manager. You will then see all the options that can be output on the LCD.
I've not been able to get this working with 2.7 though. So if anyone has any ideas for that???
-
Works fine in 2.7 for me. What problem are you seeing?
The only issue is the button mapping is incorrect. I think that's because it conflicted with the older devices at the time but none of those run pfSense any longer so maybe time to update it.
-
@stephenw10 LCDproc service wont even start on mine.
Maybe its something left over from the upgrade as the install of Unifi Network Manager is also screwed since upgrading. ( https://github.com/unofficial-unifi/unifi-pfsense )
Is there any log in particular that I can explore to find out exactly why the service wont start?
-
Try to start the service then check the system log. Though anything could be happening if you loaded that unifi package. That could very well be completely broken in 2.7 and may have pulled in some bad pkgs that also broke lcdproc.